The back-end semiconductor manufacturing process refers to the IC packaging and testing that people often hear about. Specifically, the process known as chip probing (CP) is conducted to test the ...

The shift toward more complex IC packages requires more advanced inspection systems in the production flow to capture unwanted defects in products. This includes traditional optical inspection tools ...

The Washington-based Association of Plastic Recyclers (APR), Washington recently completed a potential multimaterial 2D/3D sorting test method, “Evaluation of the 2D/3D Sorting Potential of a Whole ...

The Simcenter Micred Quality Tester from Siemens enables the assessment of a semiconductor package's thermal structure to identify manufacturing defects, including die-attach issues. With the ...

This application note presents the combinations of the features of modules and discrete in a new power semiconductor package. The document describes the packaging technology, the topologies and ...

In this work, we propose a new signal routing method for solving routing problems that occur in the design process of semiconductor package substrates. Our work uses a topological transformation of ...

Researchers have developed a high-speed cell sorting method of large cells with high-viability using dual on-chip pumps. The microfluidic chip has three-branched microchannels. Target cells are sorted ...

TOKYO--(BUSINESS WIRE)--Shin-Etsu Chemical Co., Ltd. (TOKYO: 4063) (Head Office: Tokyo; President: Yasuhiko Saitoh; hereinafter, “Shin-Etsu Chemical”) has developed equipment to manufacture ...

TOKYO--(BUSINESS WIRE)--Resonac Corporation (TOKYO:4004) (President: Hidehito Takahashi, hereinafter “Resonac”) has developed a temporary bonding film to be used for supporting a wafer on a glass ...