EDN

Mixed-signal design flow enables RF CMOS chip

Spirea AB is a Swedish fabless semiconductor company developing highly integrated low-power, low-cost radio solutions for the Wireless LAN and PAN markets. This article describes how we assembled a ...
Business Wire

Toshiba Unveils SOI Process Achieving the Lowest-class Insertion Loss in the Industry for RF Switches in Smartphones | Business Wire

TOKYO--(BUSINESS WIRE)--Toshiba Corporation’s (TOKYO:6502) Semiconductor & Storage Products Company today announced the development of “TaRF8”, a next generation TarfSOI™ (Toshiba advanced RF SOI) ...
Design-Reuse

Synopsys Boosts 5G SoC Development Productivity with New RF Design Flow for TSMC N6RF Process

With High-Quality, Tightly Integrated RFIC Design Products from Synopsys, Ansys and Keysight, Flow Facilitates Power and Performance Optimizations for N6 Wireless Systems MOUNTAIN VIEW, Calif., June ...
Business Wire

Cadence RFIC Solutions Support TSMC N6RF Design Reference Flow

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Cadence ® RFIC solutions are enabled to support TSMC’s N6RF Design Reference Flow and process design ...
EDN

InGaP HBT vs CMOS for mobile handset power amplifiers

Designers of mobile handsets and wireless networking products know that the power amplifier (PA) is a make or break component in terms of performance, footprint, and battery life. Selecting the right ...
Design-Reuse

Mixed-signal design flow enables RF CMOS chip

Spirea AB is a Swedish fabless semiconductor company developing highly integrated low-power, low-cost radio solutions for the Wireless LAN and PAN markets. This article describes how we assembled a ...