EDN

Synopsys STAR Memory System Multi-Memory Bus Processor Enables 10 Percent Die Size Reduction for Marvell SoC

Marvell achieved silicon success for networking SoC using the multi-memory bus (MMB) processor in the Synopsys DesignWare STAR Memory System for embedded test and repair Reduced area and power with a ...
EDN

Viewpoint: Memory BIST for shared-bus applications

Ron Press is the technical marketing manager of the Design for Test products at Mentor Graphics. The 20-year veteran of the test and DFT industry has presented seminars on DFT and test throughout the ...
Semiconductor Engineering

Automation Of Shared Bus Memory Test With Tessent MemoryBIST

Memory-heavy IPs for these applications are optimized for high performance, and they will often have a single access point for testing the memories. Tessent MemoryBIST provides an out-of-the-box ...
TweakTown

AMD Radeon R9 390X rumored to have truly next-gen 4096-bit memory bus

Here we are again, another post about the AMD Radeon R9 390X, but this time we have some even more exciting news. There's more details leaking out on the codename Fiji XT board, thanks to a listing in ...
Design-Reuse

Synopsys STAR Memory System Multi-Memory Bus Processor Enables 10 Percent Die Size Reduction for Marvell SoC

MOUNTAIN VIEW, Calif., Oct. 21, 2014 -- Synopsys, Inc. (Nasdaq:SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced ...