Today, FPGA designers are using these flexible devices to perform everything from simple glue logic tasks to implementing complicated system on a chip (SoC) functions. The efficiency and ease of ...

A well thought out design flow for SoCs ensures that the resulting device meets the requirement of low power dissipation. To meet these goals at the device level, individual modules (or components of ...

System designers have long used FIFO memories to couple subsystems with disparate data-transfer rates. Recently, new types of these devices–with new capabilities–have emerged. Know your FIFO choices ...

Based on a new architecture that combines high-speed queuing logic with an embedded FIFO memory core, the 72V51xxx family of multi-queue first-in-first-out (FIFO) ICs is designed to solve queuing and ...

The SPI-4.2 interface has quickly achieved the industry-wide recognition and is highly accepted as standard high-speed interface in the networking chip space. However, creating an efficient SPI-4.2 ...