Achieving high reliability and low cost package substrate compared with silicon interposer package Tokyo, December 11, 2015 --- Hitachi, Ltd. (TSE: 6501) and Hitachi Metals, Ltd. (TSE: 5486) have ...
The value of chip-package codesign is well established. Complex parts with high-speed signals put more constraints on the design of both IC and package, and careful design is required to achieve ...
As high-speed data access, transmission, and storage move from high-end computing and long-haul SONET (synchronous-optical-network) applications into portable computing and Ethernet LANs (local-area ...
Catching all defects in chip packaging is becoming more difficult, requiring a mix of electrical tests, metrology screening, and various types of inspection. And the more critical the application for ...
This article is part of the Technology Insight series, made possible with funding from Intel. We tend to focus on the latest and greatest technology nodes because they’re used to manufacture the ...
Scientists at Tokyo Institute of Technology develop a 3D functional interposer--the interface between a chip and the package substrate--containing an embedded capacitor. This compact design saves a ...
Recently, that number has risen to five, and while it adds far more flexibility for structuring electronic equipment, it also brings greater complexity and ratchets up the number of design decisions ...
Compatible with semiconductor fabrication and processing technologies, thermoelectric thin-film materials allow the cooling function to be integrated within power-semiconductor devices. Dr. Paul A.
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